FPGA/ASIC design/verification engineer

 

Beijing

 

FPGA Design Engineers are required to work with a group of FPGA designers and verification engineers in the design and sustaining of Company's Wireless product lines. Actively participate in the development of COMPANY products on data communication systems and solutions based on customer driven requirements. Working with the design team and North America engineers in a wide variety of ASIC/FPGA design activities such as FPGA architecture, create design specification, RTL coding, functional and post-layout simulation, synthesis, place and route, static timing analysis, etc.  Good written and oral English Language Skills are essential.

 

The following qualifications and experience are mandatory::

- Bachelors Degree or higher in Electrical Engineering or equivalent related degree with related experience.

- RTL code design using Verilog or VHDL hardware descriptive language

- Experience with synthesis (synopsys/synplify) and place&route

- Verification methodology and test bench development

- Static timing analysis and timing closure

 

- Familiar with version control tools such ClearCase, CVS, Design Sync, etc

- Team work and good communication skills are a must.

* Good English written skills with the ability to convey important information in reports and design documentation to both management and peers.

 

Knowledge and experience in the following areas would be an asset:

- In-depth knowledge in communication protocols and industry standard interface such as SPI3, SPI4, Utopia, PCI, PCIX, GMII, I2C, UART, DDR/DDR2, Ethernet, etc.

- Working experience in Unix/Linux OS and shell programming language like Perl, Makefile, C or Tcl

- Experience in writing assertion

- Experience with hardware board skills such as signal integrity, thermal, power and grounding

- Telecom product development experience such as CDMA, IP/Ethernet, ATM, Optical, and TDM