Beijing

 

To perform functional verification for FPGA/ASIC designs

 

FPGA/ASIC simulation and verification strategy planning and architecture design

Feature point extraction and test case planning and design and debugging.

Documentation for related tasks. Also,be responsible for document review, code inspection and other tasks required by quality process.

 

More than 1 year working experience on FPGA/ASIC verification in Telecommunication product field.

Good at C/C++ design, good understanding of OOP.

Knowledge of SystemVerilog is a must.

Knowledge on verification methodology, OVM or UVM is a must.

Knowledge and experience of FPGA design is a plus.

Be familiar with standard protocol and interfaces and IO standards, PCI, PCI-e, Local bus, SERDES, CPRI, I2C, SGMII, Flash/SDRAM.

Good sense of co-working with team members under CVS/ClearCase like source control environments is a plus.

Linux environment working capable is a plus; knowledge of script/Shell is a plus.